shishi 6c81183fd7 feat(910c/glm52): 并行配置改为只测 TP=8 和 TP=16,并按TP区分服务参数 ...

config.env: PARALLEL_CONFIGS 默认值从 "2 4"/"4 2"/"8 1" 改为 "8 1"/"16 1"
run_adaptive_concurrency_add16.sh: engine_build_server_args 按 TP 覆盖参数
- TP=8:  gpu_mem_util=0.95, max_model_len=16384,  max_num_seqs=64  (64GB/die KV cache 紧张)
- TP=16: gpu_mem_util=0.92, max_model_len=131072, max_num_seqs=256 (16 die 全用)
可通过 TP8_*/TP16_* 环境变量进一步覆盖

2026-07-28 16:51:14 +08:00

..

dsv4_910c_vllm_tp_dp_matrix

feat(dsv4): make DSV4-Flash 910C experiment runnable (verified TP4/DP2)

2026-07-28 16:36:53 +08:00

glm52_910c_vllm_tp_dp_matrix

feat(910c/glm52): 并行配置改为只测 TP=8 和 TP=16,并按TP区分服务参数

2026-07-28 16:51:14 +08:00